Bah Humbug


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Interrupted

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It has been a while. Full-time paid employment means I have enough cash to finish this but limits the time I can spend finishing it. The current state of play it that I have added some SMDs to get in some practice with those. One of the SMDs is a frequency multiplier so that with the original crystal to drive the video I can vary the CPU speed from the 3.278MHz of the original ACE up to 19.668MHz and perhaps beyond. I've also made some modifications to make the KIO optional and enable full ACE compatibility. The KIOs are very difficult to get hold of and with Z84C15 and Z182 available these seem like the best CPU to be going forward. The fastest CPU I have is 20MHz and while I had to up the speed of the RAM, everything else seem happy on the CPU side. The Video was less happy, but I am not 100% convinced that was a speed problem. The multiplier I'm using on this board is a Renesas 512MLF , which is pin compatible with the On Semiconductor NB3N502DR2G , though the multiplicat...
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CPLDs & Xilinx

One of the problems with GALs is the development tools which are way out of date. Though preparing the files by hand doesn't seem to be too difficult. The other problem is the relatively small number of pins. The next step up is  Complex Programmable Logic Devices ; CPLDs come in a far larger variety and there or some development kits available for the older legacy designs.    Some of Microchips' offerings, such as the ATF1504AS, can be programmed using WinCUPL like GALS. They also offer a full system such as ATF15XX-DK3-U that can be bought from the likes of Mouser at reasonable prices, though it is quite a high value for reasonable. Lattice & Intel also do similar things.   Having done a bit of research and found that Xilinx has released their old Integrated Synthesis Environment; ISE system, which does schematic capture. I decided to check out that route. Schematic capture is not used that much, but, I find it very useful when translating the logic designed i...
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DiagBoard

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To help me develop DEUCE, I created a simple diagnostic board, which includes a single step, reset, and LEDs for all the pins on the edge connector. It also has some duplicate pins, so I can easily use a Logic Analyser plus some power pins to allow connections to other stuff.  The ICs, on the right, are hex buffers to minimise interference with the main board. Only the RESET and WAIT lines can change the signal at the CPU.    This is a video of me powering it up in single-step mode, then doing some steps, letting it run for a while, and then back to single-step. While it is in step mode, the screen misbehaves. This happens because the software is accessing the Video RAM and locking out the VDG. The software is my little test harness which can be found on GitHub here .  The design for the diag board is also on GitHub here . There are some slight differences from this version. One is changing a label on a pin, and the other is adding a PWR LED.
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